This paper describes the design and implementation of a version of the 8051 microcontroller, one of the most commercially used microcontrollers in FPGA with reconfigurable instruction set.

Dallas – The latest redesign of Dallas Semiconductor's 8051 processor core has produced a microcontroller that's able to execute one instruction per clock cycle at 50 MHz, equivalent to 50 Mips.

Many designers using 8-bit 8051 microcontrollers as the core of their systems face a challenge when updating the performance of their designs. Historically, performance upgrades have often ...

San Jose, Ca. ” On the heels of its agreement with Programmable Integrated Circuit Co. for creating 3-D flash memory, Terrazon Semiconductor has implemented an 8051 microcontroller IP core from CAST, ...

Multi-CPU, 8051 instruction-set-compatible parallel controller executes up to 300 MIPS in Actel Axcelerator FPGA and features concurrent real-time monitoring/debugging of all 9 CPUs via JTAG using ...

MCL51 is claimed to be 100% instruction-set compatible with the 8051, and to work with any FPGA or asic technology. It is divided into the Execution Unit and the Bus Interface Unit. The execution ...

Evatronix 8051 product line manager Maciej Pyka told EW. “We wanted a processor solution with the same number of gates as a state machine.” The T8051 had to be small. “Simply, the core was designed ...