The Bit Block Transfer (BitBLT) Graphics Engine IP Core provides hardware acceleration ... works in parallel with the TFT LCD Controller IP Core, interfacing a microprocessor and frame buffer memory ...
a MCP2515 CAN controller and a CAN bus driver IC, demonstrating how this relatively simple hardware arrangement could be used along with open source software to decode some real CAN bus traffic.
The Digital Blocks DB9000AXI4 LCD / OLED Display Controller IP Core interfaces a microprocessor ... 4:2:2 YCrCb with Re-sampling & conversion to RGB, and Hardware Cursor and Frame Buffer Compression.
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