GitHub

fRAC: Remote Accelerator Calls on Hostless FPGAs

RAC Remote Accelerator Calls on FPGAs. Contribute to accl-kaust/frac development by creating an account on GitHub.
EDN

Get a hands-on tutorial in FPGA design at ESC Silicon Valley

I just heard from my chum Jason Pecor at Alorium Technology. Jason and his colleague, Bryan Craker, will be giving a 2-hour tutorial at ESC Silicon Valley 2016. Titled A Novel Hands-On Approach to ...
Silicon Semiconductor

AI-designed silicon: Redefining the route from workload to accelerator

The company has unveiled Redwood, an AI accelerator that it says was designed, verified and deployed on an FPGA in less than two weeks, starting from a specification written by two human architects.
wccftech

New AMD CPU patent reveals 3D-stacked machine learning accelerator design

On September 25, 2020, AMD issued a patent for a unique processor that offers a machine learning (ML) accelerator vertically stacked on the I/O die, or IOD. AMD may be preparing a data center-based ...
Design-Reuse

CAST Introduces GZIP Accelerator Through New Intel FPGA Data Center Acceleration Ecosystem

WOODCLIFF LAKE, NJ USA, Oct. 17, 2017 – A hardware accelerator that addresses the data compression and storage optimization needs of performance-critical data center applications is now available from ...
Electronic Design

M.2 Module Merges FPGA and 32-GB Memory

1. BittWare’s 250-M2D FPGA Accelerator is built around a Xilinx Kintex UltraScale+ FPGA. The PCI Express (PCIe) interface supports NVMe, which is de facto high-speed storage interface. The module ...
New Electronics

AMD unveils FPGA-based accelerator for ultra efficient electronic trading

AMD has unveiled its new Alveo UL3524 accelerator card, a fintech accelerator that’s been designed for ultra-low latency electronic trading applications. Already deployed by a number of trading firms, ...